Phase Detection

          We have implemented a phase detector using two methods. The first method is solely digital logic devices. Two digital signals need to be compared. The first is a reference signal created from the outgoing RF signal. The second is the returning signal from the active collector of the sensor head. The two digital signals are input to hex-schmitt trigger inverters which feature hysterises. This cleans up any problems with digital oscillations near high and low thresholds. The two signals are then input to an XOR gate. The duty cycle of the XOR output will vary with the phase difference between the signals. This XOR output is treated as a pulse-width modulation signal and is connected to a loop filter. The filtered result is a 0-5 Volt signal proportional to the phase difference between the two signals. The 0-5 Volt signal then indicates to the processor how large a change needs to be made to the DDS output frequency to get closer to the plasma resonant frequency. The microprocessor does need one more piece of data to make that change however, as it needs to know which signal is leading or lagging. This is accomplished using a D flip-flop where the reference signal is the D input and the return signal is the flip-flop clock source. The second phase detector implementation is with a single IC, the AD9901 phase/frequency discriminator. The two digital pulse trains are connected to this device, and again a 0-5 Volt signal proportional to the phase difference is output.

Please click on the picture for the full-size schematic